At the International Solid State Circuits Conference (ISSCC) today, IBM, Sony Corporation, Sony Computer Entertainment Inc. (Sony and Sony Computer Entertainment collectively referred to as Sony Group) and Toshiba Corporation (Toshiba) for the first time disclosed in detail the breakthrough multi-core architectural design - featuring supercomputer-like floating point performance with observed clock speeds greater than 4 GHz - of their jointly developed microprocessor code-named Cell.
A team of IBM, Sony Group and Toshiba engineers has collaborated on development of the Cell microprocessor at a joint design center established in Austin, Texas, since March 2001. The prototype chip is 221 mm(2), integrates 234 million transistors, and is fabricated with 90 nanometer SOI technology.
Cell's breakthrough multi-core architecture and ultra high-speed communications capabilities deliver vastly improved, real-time response for entertainment and rich media applications, in many cases 10 times the performance of the latest PC processors.
Effectively a "supercomputer on a chip" incorporating advanced multi-processing technologies used in IBM's sophisticated servers, Sony Group's computer entertainment systems and Toshiba's advanced semiconductor technology, Cell will become the broadband processor used for industrial applications to the new digital home.
Another advantage of Cell is to support multiple operating systems, such as conventional operating systems (including Linux), real-time operating systems for computer entertainment and consumer electronics applications as well as guest operating systems for specific applications, simultaneously.
Initial production of Cell microprocessors is expected to begin at IBM's 300mm wafer fabrication facility in East Fishkill, N.Y., followed by Sony Group's Nagasaki Fab, this year. IBM, Sony Group and Toshiba expect to promote Cell-based products including a broad range of industry-wide applications, from digital televisions to home servers to supercomputers.
Among the highlights of Cell released today:
- Cell is a breakthrough architectural design -- featuring eight synergistic processors and top clock speeds of greater than 4 GHz (as measured during initial hardware testing)
- Cell is a multicore chip capable of massive floating point processing
- Cell is OS neutral and supports multiple operating systems simultaneously
"Today's disclosure of the Cell chip's breakthrough architectural design is a significant milestone in an ambitious project that began four years ago with the creation of the IBM, Sony and Toshiba design lab in Austin, Texas," said William Zeitler, senior vice president and group executive, IBM Systems and Technology Group. "Today we see the tangible results of our collaboration: an open, multi-core, microprocessor that portends a new era in graphics and multi-media performance."
"Today, we are very proud to share with you the first development of the Cell project, initiated with aspirations by the joint team of IBM, Sony Group and Toshiba in March 2001," said Ken Kutaragi, executive deputy president and COO, Sony Corporation, and president and Group CEO, Sony Computer Entertainment Inc. "With Cell opening a doorway, a new chapter in computer science is about to begin."
"We are proud that Cell, a revolutionary microprocessor with a brand new architecture that leapfrogs the performance of existing processors, has been created through a perfect synergy of IBM, Sony Group and Toshiba's capabilities and talented resources, "said Masashi Muromachi, corporate vice president of Toshiba Corporation and president & CEO of Toshiba's Semiconductor Company. "We are confident that Cell will provide major momentum for the progress of digital convergence, as a core device sustaining a whole spectrum of advanced information-rich broadband applications, from consumer electronics, home entertainment through various industrial systems."
Cell is a breakthrough architectural design - featuring 8 Synergistic Processing Units (SPU) with Power-based core, with top clock speeds exceeding 4 GHz (as measured during initial laboratory testing).
Cell is OS neutral - supporting multiple operating systems simultaneously
Cell is a multicore chip comprising 8 SPUs and a 64-bit Power processor core capable of massive floating point processing
Special circuit techniques, rules for modularity and reuse, customized clocking structures, and unique power and thermalmanagement concepts were applied to optimize the design
CELL is a Multi-Core Architecture
- Contains 8 SPUs each containing a 128 entry 128-bit register file and 256KB Local Store
- Contains 64-bit Power ArchitectureTM with VMX that is a dual thread SMT design-views system memory as a 10-way coherent threaded machine
- 2.5MB of on Chip memory (512KB L2 and 8 * 256KB)
- 234 million transistors
- Prototype die size of 221mm2
- Fabricated with 90nanometer (nm) SOI process technology
- Cell is a modular architecture and floating point calculation capabilities can be adjusted by increasing or reducing the number of SPUs
CELL is a Broadband Architecture
- Compatible with 64b Power ArchitectureTM
- SPU is a RISC architecture with SIMD organization and Local Store
- 128+ concurrent transactions to memory per processor
- High speed internal element interconnect bus performing at 96B/cycle
CELL is a Real-Time Architecture
- Resource allocation (for Bandwidth Management)
- Locking caches (via Replacement Management Tables)
- Virtualization support with real time response characteristics across multiple operating systems running simultaneously
CELL is Security Enabled Architecture
- SPUs dynamically configurable as secure processors for flexible security programming
CELL is a Confluence of New Technologies
- Virtualization techniques to support conventional and real time applications
- Autonomic power management features
- Resource management for real time human interaction
- Smart memory flow controllers (DMA) to sustain bandwidth